TechSearch
International, Inc.
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4801 Spicewood
Springs Rd.,
Suite #150,
Austin, TX 78759
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Tel: 512.372.8887
Fax: 512.372.8889
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 ADVANCED PACKAGING UPDATE:
Market and Technology Trends
Vol. 2, 2009
The second volume of the Advanced Packaging Update for 2009 provides an updated economic outlook for the world economy and the semiconductor packaging and assembly sector. This issue features TechSearch International’s annual survey on IC package assembly price trends. Packages include QFPs, PBGAs, flip chip PBGAs, leadframe CSPs (QFNs, etc.), and laminate CSPs (FBGA). An analysis of the trends in the movement to copper wire bonding as a cost-savings strategy is also provided. Special coverage of substrate design rules from suppliers of organic flip chip substrates, PBGAs, and laminate CSPs worldwide is highlighted. The design rules include body size, core thickness, via and pad diameter, minimum bump pitch supported, and substrate finish.
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Advanced Packaging Update: Market and Technology Trends
Vol. 2, 2009 |
| File size: 44.0 kb |
Published: October 2009. |
| Table of Contents |
| 1 |
Industry and Economic Trends |
| 1.1 |
Economic Trends |
| 1.1.1 |
Macroeconomic Trends |
| 1.1.2 |
Recovery in the Electronics Industry |
| 1.2 |
Foundry Shipments and CAPEX Increase |
| 1.3 |
Semiconductor Packaging and Assembly |
| 2 |
IC Package Assembly Price Trends |
| 2.1 |
QFPs |
| 2.2 |
Wire Bond PBGAs |
| 2.3 |
Flip Chip PBGAs |
| 2.4 |
Laminate CSPs |
| 2.5 |
Leadframe CSPs |
| 2.6 |
Future Price Trends |
| 3 |
Copper Wire Bond Update |
| 3.1 |
Advantages of Copper Wire |
| 3.2 |
Issues with Copper Wire |
| 3.2.1 |
Bonding Process and Low-k Dielectrics |
| 3.2.2 |
Reliability |
| 3.3 |
New Developments |
| 3.3.1 |
Coated Wire |
| 3.4 |
Company Activities |
| 3.4.1 |
Amkor Technology |
| 3.4.2 |
ASE Group |
| 3.4.3 |
ASM Pacific Technology, Ltd. |
| 3.4.4 |
Carsem, Inc. |
| 3.4.5 |
Freescale Semiconductor |
| 3.4.6 |
Kulicke & Soffa Industries, Inc. |
| 3.4.7 |
MK Electron Co., Ltd. |
| 3.4.8 |
National Semiconductor |
| 3.4.9 |
Shinkawa |
| 3.4.10 |
Siliconware Precision Industries Co., Ltd. |
| 3.4.11 |
STATS ChipPAC, Ltd. |
| 3.4.12 |
STMicroelectronics, Inc. |
| 3.4.13 |
Texas Instruments, Inc. |
| 3.4.14 |
Unisem |
| 3.4.15 |
UTAC |
| 4 |
New Package Developments |
| 4.1 |
NEC's Embedded Coreless Flip Chip Package |
| 5 |
Substrate Design Rules |
| 5.1 |
ASE Materials |
| 5.2 |
Daisho Denshi Co., Ltd. |
| 5.3 |
Eastern Company, Ltd. |
| 5.4 |
Endicott Interconnect Technologies |
| 5.5 |
Fujitsu Interconnect Technologies, Ltd. |
| 5.6 |
Ibiden Co., Ltd. |
| 5.7 |
Japan Circuit Industrial Co., Ltd. |
| 5.8 |
Kinsus Interconnect Technology Corp. |
| 5.9 |
Kyocera SLC Technologies, Inc. |
| 5.10 |
Microcircuit Technology Pte., Ltd. |
| 5.11 |
Nan Ya PCB Corporation |
| 5.12 |
NEC Toppan Circuit Solutions, Inc. |
| 5.13 |
NTK Technologies, Inc. |
| 5.14 |
Phoenix Precision Technology Corporation |
| 5.15 |
Samsung Electro–Mechanics Ltd. |
| 5.16 |
Samsung Techwin |
| 5.17 |
Shinko Electric Industries Co., Ltd. |
| 5.18 |
Simmtech Co., Ltd. |
| 5.19 |
Tripod Technology Corporation |
| 5.20 |
Unimicron Technology Corporation |
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Appendix: Substrate Suppliers |
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| List of Figures |
| 1.1. |
Monthly U.S. housing starts. |
| 1.2. |
Increases in 2009 CAPEX by major subcontract assembly operations ($ millions). |
| 2.1. |
Gold price trends. |
| 2.2. |
Copper price trends. |
| 2.3. |
QFP and PBGA assembly price trends and projections. |
| 2.4. |
QFN assembly price trends and projections. |
| 3.1. |
Copper production growth. |
| 3.2. |
Bonding ball failure as a function of heating time after bonding. |
| 3.3. |
Kulicke & Soffa's bond pad design rules for copper wire bonding. |
| 3.4. |
Normalized shear for the plating finishes. |
| 3.5. |
Copper balls on (a) nickel and (c) aluminum pads. |
| 3.6. |
SPIL's wire bond technology, including copper. |
| 3.7. |
X-rays of damaged copper wires after 2,400 hours at 200ºC, 2.5A. |
| 4.1. |
Cross-sections of NEC's coreless flip chip package. |
| 4.2. |
Strip lines in new package versus reference FCBGA. |
| List of Tables |
| 2.1. |
Average QFP Assembly Price Trends (1 million/month) |
| 2.2. |
QFP Assembly Prices in 2009 |
| 2.3. |
Average Wire Bond PBGA Assembly Price Trends (1 million/month) |
| 2.4. |
Average Wire bond PBGA Assembly Prices in 2009 |
| 2.5. |
Average Flip Chip PBGA Assembly Prices (including substrate) |
| 2.6. |
Average Laminate CSP Assembly Prices |
| 2.7. |
Average Wire Bond QFN Assembly Price Trends |
| 2.8. |
QFN Assembly Prices in 2009 |
| 3.1. |
Hardness of Bonding Metals |
| 3.2. |
Ni-Pd-Au Surface Finishes in K&S Bond Pad Study |
| 3.3. |
MK Electron's Copper Wire Offerings |
| 5.1. |
Selected Build-up Flip Chip Substrate Suppliers |
| 5.2. |
Selected Laminate PBGA/CSP Substrate Suppliers |
| 5.3. |
Design Rules for ASE PBGA/CSP Substrates |
| 5.4. |
Design Rules for Daisho Denshi PBGA/CSP Substrates |
| 5.5. |
Design Rules for Eastern PBGA/CSP Substrates |
| 5.6. |
Design Rules for Endicott Interconnect CoreEZ® Substrates |
| 5.7. |
Design Rules for Endicott Interconnect HyperBGA® Substrate |
| 5.8. |
Design Rules for Endicott Interconnect PBGA Substrates |
| 5.9. |
Design Rules for FICT's Flip Chip Substrates |
| 5.10. |
Design Rules for JCI CSP Substrates |
| 5.11. |
Design Rules for Kinsus Flip Chip Substrates |
| 5.12. |
Design Rules for Kinsus PBGA/CSP Substrates |
| 5.13. |
Design Rules for Kyocera Flip Chip Substrates |
| 5.14. |
Design Rules for Microcircuit PBGA/CSP Substrates |
| 5.15. |
Design Rules for Nan Ya PCB Flip Chip Substrates |
| 5.16. |
Design Rules for Nan Ya PCB PBGA Substrates |
| 5.17. |
Design Rules for TNCSi Flip Chip Substrates |
| 5.18. |
Design Rules for NTK Flip Chip Substrates |
| 5.19. |
Design Rules for PPT Flip Chip Substrates |
| 5.20. |
Design Rules for PPT PBGA/CSP Substrates |
| 5.21. |
Design Rules for Samsung's PBGA/CSP Substrates |
| 5.22. |
Design Rules for Samsung Techwin's BOC Substrates |
| 5.23. |
Design Rules for Shinko Electric's Flip Chip Substrates |
| 5.24. |
Design Rules for Shinko PBGA/CSP Substrates |
| 5.25. |
Design Rules for Simmtech PBGA/CSP Substrates |
| 5.26. |
Design Rules for Tripod's PBGA/CSP Substrates |
| 5.27. |
Design Rules for Unimicron Flip Chip Substrates |
| 5.28. |
Design Rules for Unimicron PBGA/CSP Substrates |
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