TechSearch International’s latest report: 2022 Flip Chip and WLP: Trends and Market Forecasts examines the impact of slowing consumer demand on the flip chip and WLP market growth. The report includes an examination of both fan-in WLP and fan-out WLP markets. The report also examines bump pitch trends and the role of hybrid bonding.

Chiplet architectures are increasingly being adopted to achieve the economic advantages lost with the high cost of silicon scaling on advanced nodes. With chiplet designs, more silicon is needed to support the disaggregation of the monolithic die into smaller intellectual property (IP) building blocks. Many devices have made the conversion from solder bumps to Cu pillar. FO-WLP processes in production using the Deca M-Series™ and TSMC’s InFO use a Cu pillar on the native wafer. Reduced demand for smartphones and PCs this year is changing demand for flip chip packages, but growth will continue. The compound annual growth rate (CAGR) for all types of flip chip devices in units from 2021 to 2026 is 4.5 percent. This includes both solder bump and Cu pillar. Industry-wide capacity utilization was extremely high last year, but has decreased more than 10 percent this year. With continued capacity expansion, utilization will not reach levels seen in 2021 over the next several years.

Despite lower demand for consumer products such as smartphones, Fan-in WLP shipments will increase this year because of continued growth in image sensor demand, particularly for surveillance cameras in China. The WLP count continues to climb for most products. In a few cases, WLP counts have declined in products due to higher levels of integration. The projected CAGR from 2021 to 2026 in units is 7.83 percent. Devices using FO-WLP include application processors, RF, PMICs, audio CODEC, envelope trackers, automotive radar, and some image sensors. Single die are common and multi-die configurations are increasing. A 6.3 percent CAGR in units is projected for 2021 to 2026. Several companies are researching, developing, or installing panel-based production lines. A variety of approaches for large-area production have been developed. No consistent method or panel size has emerged, but several companies have adopted panel sizes of 600 mm x 600 mm. While applications for panels include some portion of the reconstituted wafer market, new applications such as power devices are emerging.

The latest analysis is a 106-page report with full references and an accompanying set of 136 PowerPoint slides.