Volume 2-0819

August 2019
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This second volume of the Advanced Packaging Update presents new developments in advanced packaging substrates, including high-density RDL interposers. Intel’s packaging announcements are described. A special section examines mobile phone trends, including a comparison of 5G to non-5G phones, and packages found in feature phones. TechSearch International’s annual survey on substrate design rules is highlighted, with special coverage of suppliers of laminate flip chip BGA and CSP substrates worldwide. The design rules include body size, core thickness, via and pad diameter, minimum bump pitch supported, and substrate finish.
  • Contents…
    • 1 Industry and Economic Trends
      • 1.1 Economic Trends
        • 1.1.1 U.S. Macroeconomic Trends
      • 1.2 Trade Friction
      • 1.3 OSATs
      • 1.4 TSMC's Outlook
    • ​2 Mobile Phone Trends
      • ​2.1 Packaging Trends for 5G Smartphones
        • 2.1.1 5G Modem Packages
        • 2.1.2 5G RF Transceiver Packages
        • 2.1.3 RF Power Management Packages
        • 2.1.4 5G RF Front-End Module Packages
      • 2.2 Galaxy S10+ and S10 5G Comparison
      • 2.3 Feature Phones
    • 3 Advanced Substrate Developments
      • ​3.1 RDL Interposers
        • 3.1.1 RDL Substrate Developments
        • 3.1.2 Samsung
        • 3.1.3 Shinko Electric
        • 3.1.4 Toppan
        • 3.1.5 TSMC
        • 3.1.6 Unimicron
        • 3.1.7 High-Density Substrate Demand
      • 3.2 Intel's Strategic Packaging Direction
        • 3.2.1 Laptops
        • 3.2.2 Thin Core Substrates
        • 3.2.3 Embedded Bridge and 3D Configurations
        • 3.2.4 Substrate Supplier Developments
        • 3.2.5 Test is Key
        • 3.2.6 Thermal Developments
      • 3.3 Glass Substrates
        • 3.3.1 AGC Incorporated
        • 3.3.2 Dai Nippon Printing
        • 3.3.3 Unimicron
    • 4 Substrate Design Rules
      • 4.1 Today's Laminate Feature Sizes
      • 4.2 Company Design Rules
        • 4.2.1 ACCESS Semiconductor Co.
        • 4.2.2 ASE Materials
        • 4.2.3 AT&S
        • 4.2.4 Daeduck
        • 4.2.5 Daisho Denshi Co.
        • 4.2.6 Fujitsu Interconnect Technologies
        • 4.2.7 Haesung DS Co.
        • 4.2.8 Ibiden Co.
        • 4.2.9 i3 Electronics
        • 4.2.10 Kinsus Interconnect Technology Corp.
        • 4.2.11 Korea Circuit Company
        • 4.2.12 Kyocera International
        • 4.2.13 LG Innotek
        • 4.2.14 Nan Ya PCB Corp
        • 4.2.15 Samsung Electro-Mechanics
        • 4.2.16 Shennan Circuits Co.
        • 4.2.17 Shinko Electric Industries Co.
        • 4.2.18 Simmtech Co.
        • 4.2.19 Toppan Printing Co.
        • 4.2.20 Unimicron Technology Corp.
    • Appendix: Substrate Suppliers
    • References
  • Figures…
    • 1.1 Monthly U.S. housing starts.
    • 2.1 Galaxy S10 5G triple-stack design for main board.
    • 3.1 Cross-section of i-THOP®.
    • 3.2 Organic interposer stacking on build-up substrate.
    • 3.3 Unimicron RDL substrate process.
    • 3.4 Future coreless with embedded bridge.
    • 3.5 Foveros technology.
    • 3.6 Fine-pitch and coarse-pitch Cu-bridge TGVs.
  • Tables…
    • 1.1 OSAT Revenue Q2 2018 vs. Q2 2019
    • 2.1 5G Smartphones in Mass Production
    • 2.2 5G Modem Specifications
    • 2.3 5G RF Transceiver Specifications
    • 2.4 PMIC and ET Specifications
    • 2.5 5G RFFE Module Specifications
    • 2.6 Specifications for Galaxy S10+ and S10 5G
    • 2.7 Comparison of Galaxy S10+ and S10 5G Chips
    • 2.8 Nokia Feature Phone Examples
    • 2.9 Alcatel Go Flip Features
    • 3.1 High-Density RDL Interposers
    • 3.2 Toppan RDL Interposer Design Rules
    • 3.3 Market Projections for High-Density Panels
    • 3.4 Intel Packaging Trends
    • 4.1 Selected Build-up FC-PBGA Substrate Suppliers
    • 4.2 Selected Build-up FC-CSP Substrate Suppliers
    • 4.3 Selected Laminate PBGA/CSP Substrate Suppliers
    • 4.4 Design Rules for ACCESS Coreless Substrates
    • 4.5 Design Rules for ACCESS FC-CSP Substrates
    • 4.6 Design Rules for ACCESS Wire Bond CSP Substrates
    • 4.7 Design Rules for ASE PBGA/CSP Substrates
    • 4.8 Design Rules for AT&S FC-PBGA Substrates
    • 4.9 Design Rules for Daeduck FC-CSP Substrates
    • 4.10 Design Rules for Daeduck Thin Build-Up WB Substrates
    • 4.11 Design Rules for Daisho Denshi PBGA/CSP Substrates
    • 4.12 Design Rules for FICT FC-PBGA Substrates
    • 4.13 Design Rules for Ibiden FC-PBGA Substrates
    • 4.14 Design Rules for Ibiden FC-CSP Substrates
    • 4.15 Design Rules for Ibiden Coreless Substrates
    • 4.16 Design Rules for CoreEZ® Substrates
    • 4.17 Design Rules for HyperBGA® Substrate
    • 4.18 Design Rules for i3 Electronics PBGA Substrates
    • 4.19 Design Rules for MicroFlex (Polyimide)
    • 4.20 Design Rules for Kinsus FC-PBGA Substrates
    • 4.21 Design Rules for Kinsus FC-CSP Substrates
    • 4.22 Design Rules for Kinsus PBGA/CSP Substrates
    • 4.23 Design Rules for Kinsus Coreless Substrates
    • 4.24 Design Rules for Korea Circuit Company FC-CSP Substrates
    • 4.25 Design Rules for Korea Circuit Company PBGA Substrates
    • 4.26 Design Rules for Kyocera FC-PBGA Substrates
    • 4.27 Design Rules for Kyocera FC-CSP Substrates
    • 4.28 Design Rules for Kyocera Coreless Substrates
    • 4.29 Design Rules for LG Innotek CSP Substrates
    • 4.30 Design Rules for LG Innotek FC-CSP Substrates
    • 4.31 Design Rules for Nan Ya PCB FC-PBGA Substrates
    • 4.32 Design Rules for Nan Ya PCB PBGA/CSP Substrates
    • 4.33 Design Rules for Nan Ya FC-CSP Substrates
    • 4.34 Design Rules for Nan Ya PCB FC-PBGA Coreless Substrates
    • 4.35 Design Rules for SEMCO FC-PBGA Substrates
    • 4.36 Design Rules for SEMCO PBGA/CSP Substrates
    • 4.37 Design Rules for SEMCO FC-CSP Substrates
    • 4.38 Design Rules for SCC PBGA/CSP Substrates
    • 4.39 Design Rules for Shinko Electric FC-PBGA Substrates
    • 4.40 Design Rules for Shinko Electric FC-CSP Substrates
    • 4.41 Design Rules for Shinko Electric Coreless Substrates
    • 4.42 Design Rules for Shinko Electric PBGA/CSP Substrates
    • 4.43 Design Rules for Simmtech PBGA/CSP Substrates
    • 4.44 Design Rules for Simmtech Coreless Substrates
    • 4.45 Design Rules for Toppan FC-PBGA Substrates
    • 4.46 Design Rules for Toppan Coreless Substrates
    • 4.47 Design Rules for Unimicron FC-PBGA Substrates
    • 4.48 Design Rules for Unimicron FC-CSP Substrates
    • 4.49 Design Rules for Unimicron PBGA/CSP Substrates

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  • Published August 2019
  • 83 pages
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